Topic : The ATARI Compendium
Author : Scott Sanders / JAY Software
Version : 1.25 (20/6/2003)
Subject : Documentation
Nodes : 1117
Index Size : 32614
HCP-Version : 6
Compiled on : Atari
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@lang : en
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View Ref-FileGiaccess() XBIOSSyntaxWORD Giaccess( data, register )
WORD data, register;
Function Giaccess() reads/sets the registers of the FM sound chip and
Port A/B peripherals.
Opcode 28 (0x1C)
Availability All TOSversions.
Parameters The lower eight bits of data are written to the register
selected by register if the value for register is OR'ed with
0x80 (high bit set). If this bit is not set, data is ignored
and the value of the register is returned.
register selects the register to read/write to as follows:
Name register Meaning
PSG_APITCHLOW 0 Set the pitch of the PSG's channel
PSG_APITCHHIGH 1 A to the value in registers 0 and 1.
Register 0 contains the lower 8 bits
of the frequency and the lower 4
bits of register 1 contain the upper
4 bits of the frequency's 12-bit
value.
PSG_BPITCHLOW 2 Set the pitch of the PSG's channel B
PSG_BPITCHHIGH 3 to the value in registers 0 and 1.
Register 0 contains the lower 8 bits
of the frequency and the lower 4
bits of register 1 contain the upper
4 bits of the frequency's 12-bit
value.
PSG_CPITCHLOW 4 Set the pitch of the PSG's channel C
PSG_CPITCHHIGH 5 to the value in registers 0 and 1.
Register 0 contains the lower 8 bits
of the frequency and the lower 4
bits of register 1 contain the upper
4 bits of the frequency's 12-bit
value.
PSG_NOISEPITCH 6 The lower five bits of this register
set the pitch of white noise. The
lower the value, the higher the
pitch.
PSG_MODE 7 This register contains an eight bit
map which determines various aspects
of sound generation. Setting each
bit on causes the following
actions:
Name Bit Mask Meaning
PSG_ENABLEA 0x01 Chnl A tone enable
PSG_ENABLEB 0x02 Chnl B tone enable
PSG_ENABLEC 0x04 Chnl C tone enable
PSG_NOISEA 0x08 Chnl A white\
PSG_NOISEB 0x10 Chnl B white |-\
PSG_NOISEC 0x20 Chnl C white/ |
noise on
PSG_PRTAOUT 0x40 Port A: 0 = input
1 = output
PSG_PRTBOUT 0x80 Port B: 0 = input
1 = output
PSG_AVOLUME 8 This register controls the volume of
channel A. Values from 0-15 are
absolute volumes with 0 being the
softest and 15 being the loudest.
Setting bit 4 causes the PSG to
ignore the volume setting and to use
the envelope setting in register 13.
PSG_BVOLUME 9 This register controls the volume of
channel B. Values from 0-15 are
absolute volumes with 0 being the
softest and 15 being the loudest.
Setting bit 4 causes the PSG to
ignore the volume setting and to use
the envelope setting in register 13.
PSG_CVOLUME 10 This register controls the volume of
channel C. Values from 0-15 are
absolute volumes with 0 being the
softest and 15 being the loudest.
Setting bit 4 causes the PSG to
ignore the volume setting and to use
the envelope setting in register 13.
PSG_FREQLOW 11 Register 11 contains the low byte
PSG_FREQHIGH 12 and register 12 contains the high
byte of the frequency of the
waveform specified in register 13.
This value may range from 0 to
65535.
PSG_ENVELOPE 13 The lower four bits of the register
contain a value which defines the
envelope wavefrom of the PSG. The
best definition of values is
obtained through experimentation.
PSG_PORTA 14 This register accesses Port A of the
Yamaha PSG. It is recommended that
the functions Ongibit() and
Offgibit() be used to access this
register.
PSG_PORTB 15 This register accesses Port B of the
Yamaha PSG. This register is
currently assigned to the data
in/out line of the Centronics
Parallel port.
Binding move.w register,-(sp)
move.w data,-(sp)
move.w #$1C,-(sp)
trap #14
addq.l #6,sp
Return Value Giaccess() returns the value of the register in the lower
eight bits of the word if data was OR'ed with 0x80.